Digital integrated circuits contain many electronic components such as transistors, resistors, and capacitors. It is advantageous to partition the design of the digital integrated circuit, where certain circuit components are grouped together and can be reused repeatedly through the digital integrated circuit or subsequent designs. These groupings of components (“cells”) are often incorporated into various digital libraries that can be utilized with electronic circuit design software. Each library can have component groups that utilize different voltage, power, or speed values. In the design and layout of a digital integrated circuit, different libraries can be utilized and selected from for the necessary component groupings needed for a design. However, the component groupings in these different libraries can have cells of distinctly different heights and widths from each other.
Standard cell placement in electronic circuit design software is based on a placement grid, which has a basic grid cell of a unit size. This unit size, called a site, is based on the smallest height cell (i.e., for the height of the unit size) and the lowest orthogonal routing layer pitch distance (i.e., for the width value of the unit size). Once the basic site size is established, rows of this basic site are used to create a placement grid. Thus, placement is based on row-height, or overlapping multi-height rows, which are exact-integer multiples of a basic row.
Presently, when designing a digital integrated circuit with electronic software tools, separate base height cells are placed in separate “hierarchical” partitions. These placements must be performed during different placement sessions by an operator using the electronic circuit design software. Upon completion of these placement operations during separate sessions, these individual placements can be merged, during another separate session, as “hard blocks” at the top-level of the digital integrated circuit design. Thus, an operator of the electronic circuit design software is not able to optimize design and layout of component groupings across these hierarchies, nor is the operator able to do any other “dependent” operation, such as inserting clock trees, routing, etc.
Accordingly, what is needed are systems and methods for flat placement of cells in Non-Integer Multiple-Height (NIMH) rows in a digital integrated circuit design layout. What is additionally needed are systems and methods that allow an operator of electronic circuit design software to place different NIMH rows during the same session.